The present invention relates to a single-crystal component to be applied to an optical component such as an optical module and its fabrication method.
A single-crystal substrate made of Si or the like has the crystal orientation dependency of an etching rate due to the anisotropy of an atomic arrangement. Because of this characteristic, the single-crystal substrate makes it possible to form a geometric shape reflecting a crystal structure through etching by selecting a proper etching species. This is the so-called anisotropic etching which is practically used for various semiconductor processes and the micro-machining art for fabricating a micro mechanism on a substrate.
The anisotropic etching has been recently noticed as a technique for machining an optical mounting component requiring a high-accuracy machining. As an example of applying the anisotropic etching to an optical mounting component, there is an example of working a V-groove for holding an optical fiber on an Si substrate. This example has a feature that it is superior in working accuracy and mass productivity compared to an example of using mechanical cutting. As the reasons, it is possible to perform control in submicrons because a semiconductor process is used and work a lot of Si wafers at the same time because tens of Si wafers can be treated (worked) at the same time by incorporating a lot of workpieces into the Si wafers similarly to the case of an IC chip. Moreover, because the semiconductor process is used, it is possible to easily form a wiring electrode on a substrate and there is an advantage that machining and electrical wiring can be performed at the same time or in a series of processes.
However, these arts have problems caused by using a semiconductor process. That is, because the semiconductor process mainly performs the so-called thin-film formation, there is a practical restriction in the forming range and therefore, the process is not suitable for the machining having a large step. In general, a step in a substrate allowed in the semiconductor process is 10 .mu.m or less. Even when only forming a mask pattern on the surface to form a groove, the semiconductor process is restricted to the machining for a step of up to approx. 100 .mu.m in most cases. This is because the semiconductor process purposes the machining of micron order and thereby, it cannot correspond to an extremely large step machining.
In general, dry etching frequently used for the semiconductor process cannot perform a very deep etching because the etching rate is relatively small and due to an economic restriction on working time because treatment is performed in accordance with the single wafer processing. In this case, a practically possible etching depth is approx. 50 to 100 .mu.m. Moreover, in the case of the wet etching having a relatively large etching rate and easily allowing batch processing, a very deep etching is theoretically possible. In this case, however, there is a problem that a micro shape deformation due to etching irregularity or crystal defect spreads as etching progresses. Therefore, an etching depth is restricted to a certain value in view of the working yield. The then depth is approx. 100 .mu.m as described above and this is described while referring to the accompanying drawings.
FIGS. 1A to 1C are sectional views of processes showing a working example according to the conventional anisotropic etching. FIGS. 1A to 1C show a case in which a single crystal substrate uses Si as a typical example used for micro-machining. In FIGS. 1A to 1C, symbol 1 denotes a single-crystal Si substrate, 2 denotes an etching mask, and 3 denotes an etched portion. In the case of the anisotropic etching of Si, the mask 2 uses an oxide film or nitride film such as SiO.sub.2 or Si.sub.3 N.sub.4 and an etching solution uses a KOH solution or hydrazine having a high crystal-orientation dependency of etching rate. FIGS. 1A to 1C show sectional views when the surface of the Si substrate 1 has (100) plane and the etched portion 3 has a rectangular opening having &lt;110&gt; and &lt;1-10&gt; directions on the surface of a Si substrate.
First, FIG. 1A shows a state in which the mask 2 is formed on the Si substrate 1 and patterning of photoresist and transfer of the pattern to the mask are completed. FIG. 1B shows a state in which the mask 2 is put in an etching solution and etching is currently performed. Single-crystal Si has a property that the etching rate on (111) plane is smaller than that of other crystal planes. Therefore, when starting etching from (100) plane, etching progresses in a shape exposing (111) slope continued from a mask boundary as shown in FIG. 1B.
In this case, symbol 4 denotes an abnormally etched portion caused by etching irregularity or crystal defect, which is an etching defect produced when the boundary between the mask 2 and the substrate surface is locally quickly etched. This abnormal etching is observed when a foreign matter enters the boundary between a substrate and a mask or there is a crystal defect on a substrate or when an etching solution is irregularly agitated or the solution causes an abnormal flow due to bubbles, and occurs though there is no mask shape defect apparently. It is a matter of course that an etching shape is deformed when there is a defect on a mask pattern. However, this factor is another problem because it is related to imperfect formation of a mask pattern.
Moreover, when the linear portion of the above mask has a deviation from the crystal orientation, a cyclic discontinuous boundary for eliminating a directional deviation between the crystal plane and the mask appears on the etching slope, causing the same result as the case of the abnormal etching. However, this is also another problem. Therefore, an etching yield represents a factor due to abnormal etching. Thus, description is hereafter made by omitting a defect and orientational deviation of a mask pattern.
FIG. 1C shows a state in which etching is further progressed up to a depth where (111) planes at the both sides of the mask collide with each other. In this case, a normal portion becomes a V shape symmetric to the mask 2 at right and left. However, at a portion (4') formed because the shape deformation shown by symbol 4 due to abnormal etching is progressed, not only the center of the V shape is deviated but also the width of the V-groove is increased. Moreover, the abnormal etching not only locally progresses in the depth direction but also causes a critical problem that the entire shape is deformed by actually progressing in the transverse direction. This is described by referring to FIGS. 2A to 2C to FIGS. 6A to 6C.
FIGS. 2A to 2C to FIGS. 6A to 6C are illustrations showing the etching states shown in FIGS. 1A to 1C viewed from the upper sides and by making the cross sections of abnormal and normal portions correspond to the states respectively and moreover show the cross sections of A (abnormally etched portion) and B (normally etched portion) attached to the upper sides of the drawings at the right respectively. Moreover, a portion same as that in FIGS. 1A to 1C is provided with the same symbol.
FIGS. 2A to 2C show a state in which a mask is formed similarly to the case of FIG. 1A, FIGS. 3A to 3C show a state in which etching is currently performed similarly to the case of FIG. 1B, and FIGS. 3A to 3C show an initial state in which the defect 4 (abnormally etched portion) is produced. Though the degree of collapse of the etching shape is small at this stage, the etching rate is easily accelerated because the cross section of the abnormally etched portion protruded beyond (111) plane (4") extended from a mask end.
Therefore, the abnormally etched portion does not spread proportionally to the entire etching progress but it first progresses in the depth direction (FIGS. 4A to 4C) and simultaneously spreads in the transverse direction. Moreover, when the spread of the abnormally etched portion reaches to a certain extent, the etching in the depth direction catches up with the depth of the normally etched portion (FIGS. 5A to 5C). Thereafter, etching progresses in the depth direction at the abnormally etched portion similarly to the normally etched portion. In this case, however, spread in the transverse direction also progresses at the abnormally etched portion.
Finally, even when the normally etched portion completely becomes V-shape, etching progresses so as to form an eccentric deeper V-groove at the abnormally etched portion. Even after the abnormally etched portion becomes V-shape, spread in the transverse direction progresses (FIGS. 6A to 6C). If the etching is continued under the above state, a single V-groove whose center is deviated as a whole is finally formed at the width of the V-shape of the abnormally etched portion. Therefore, an initial slight abnormal etching would finally result in an essential problem causing a predetermined etching shape to greatly deform.
Though the above abnormal etching does not frequently occur when etching is relatively shallow, it occurs considerably frequently when deep etching is performed. Though depending on an etching condition, abnormal etching does not frequently occur up to approx. 100 .mu.m. However, abnormal etching occurs considerably frequently in the case of deep etching such as 300 .mu.m or more. Moreover, abnormal etching does not occur at a single portion as described above but it may occur at many portions in most cases once it starts. Therefore, it is frequently possible to decide whether abnormal etching occurs even through relatively macro observation of an etching state.
FIG. 7 shows an optical mounting component using anisotropic etching, which is an example for specifically showing the influence of the above abnormal etching. In FIG. 7, symbol 1 denotes a Si substrate, 3 denotes a relatively deep V-groove, 5 denotes a relatively shallow V-groove, and 7 denotes an electrode metal for mounting an optical device. In this case, the relatively deep V-groove 3 and the relatively shallow V-groove 5 are used to mount different members requiring position matching each other on the same substrate and aligning them and moreover, the shallow V-groove 5 is used to hold an optical fiber and the deep V-groove 3 is used to hold a guide pin of an optical connector. For example, an optical fiber having a diameter of 125 .mu.m is combined with a guide pin having a diameter of 700 .mu.m. In this case, when assuming the surface of the Si substrate as a reference position, the shallow groove requires a depth of 62.5 .mu.m or more and the deep groove requires a depth of 350 .mu.m or more.
FIGS. 8A to 8C show a case of simply etching two groove at the same time. To make the centers of the optical fiber and guide pin level with the Si substrate surface on the basis of the Si substrate surface, it is necessary that the surface width of the V-groove is set to approx. 153 .mu.m for the optical fiber and approx. 857 .mu.m for the guide pin.
Moreover, it is necessary to set the etching mask 2 to a value obtained by subtracting an undercut value of the etching corresponding to an etching time from the above width.
An etching mask is patterned in accordance with the above design as shown in FIG. 8A to apply anisotropic etching. In the case of the above setting, a narrow V-groove is completely formed into a V shape before 108 .mu.m when the etching depth reaches approx. 108 .mu.m or the mask width 5 is slightly narrowed by considering the subsequent undercut (FIG. 8B). At this stage, most portions are normal because etching is relatively shallow and therefore, the yield of etching hardly becomes an issue.
The above-described abnormal etching is frequently recognized when the etching depth is approx. 200 .mu.m from experiences. Therefore, it is estimated that a portion serving as the species of abnormal etching is produced at the point of time in FIG. 8B or earlier point of time after the point of time in FIG. 8B. Hereafter, etching is continued until a wide V-groove has a depth of at least 350 .mu.m. However, because etching is deep, the abnormal-etching occurrence rate also increases and the number of wide V-grooves having an abnormally etched portion 4' increases as shown in FIG. 8C. Also, the number of narrow V-grooves 5 having an abnormally etched portion increases because they are exposed to an etching solution for a long time. As the result of experiments by the present inventor et al., though a test of simultaneously etching 10 or more Si wafers was performed more than ten times, the percent non-defective in which both grooves were normally etched did not reach several percents. Though changing several etching conditions, the same result was obtained and the correlations between wafer planes, between wafers, and between lots were not very significant.
FIGS. 9A to 9D show an improved example for preventing the yield from decreasing due to defects of the narrow V-grooves of the related art shown in FIGS. 8A to 8C. As shown in FIGS. 9A to 9D, a narrow V-groove 5 and a wide V-groove 3 are separately worked and there is a feature that a trouble due to a defect of the narrow V-groove 3 though the wide V-groove 5 is normal can be eliminated. In this case, it is necessary to form an etching mask two times. However, because the narrow V-groove 5 is protected by the second-time etching mask 2' after relatively wide etching, it is almost prevented to cause abnormal etching due to exposure to an etching solution for a long time. Therefore, the percent defective of the narrow (shallow) V-groove 5 can be extremely decreased and the overall yield can be improved.
However, even in the case of this method, the yield of the wide (deep) V-groove did not change. Therefore, the overall etching yield was not very large and a percent non-defective of only approx. 10% was obtained even in a relatively preferable case. Moreover, in the case of this method, the etching time increases and the process cost increases because the grooves are worked separately from each other and furthermore, a trouble may occur due to misalignment between the fist-time and second-time masks.
To shorten the etching time, there is a method of providing the second-time mask for the portion in FIG. 8B and shifting to FIGS. 9C and 9D. However, the problem of misalignment is the same as the case of the conventional example in FIGS. 9A to 9D and the yield of the deep groove 3 is still a problem. In any case, in the case of the conventional anisotropic etching method, the process yield due to abnormal etching become an issue when deep etching of 300 .mu.m or more is necessary.
Thus, conventionally, there is a problem that working requiring a deep groove is very difficult because a practical etching depth is up to approx. 100 .mu.m even by using anisotropic etching to form a single-crystal component.
It is an object of the present invention to provide a single-crystal component and its fabrication method making it possible to realize deep etching of 300 .mu.m or more at a preferable reproducibility and a high yield in the case of single crystal Si and improve the working accuracy of a groove through etching, and moreover provide an optical component and an optical module.